1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device, and more particularly, to a semiconductor device which operates at a high withstand voltage.
2. Background Art
In a related-art MOSFET, the breakdown voltage of a transistor is determined by the breakdown voltage between a gate terminal and an Nxe2x88x92-region of the drain of the transistor. In the case of a high-voltage MOSFET, the transistor is destroyed when a surge voltage is applied across the source and the drain of the MOSFET.
For this reason, the breakdown voltage between an N+ drain and a P-epitaxial layer formed on a semiconductor substrate is lowered to be lower than the breakdown voltage of the gate terminal of the drain layer. If a surge voltage is applied to an N+ region of the drain, there is a breakdown between the N+ region of the drain and the P-epitaxial layer before application to the transistor of a high electric field which would break down a gate oxide film, thereby protecting the transistor.
However, when the breakdown voltage developing between the N+ region of the drain and the P-epitaxial layer is made lower than the breakdown voltage at the gate terminal, the drain N+ region must be deepened until the desired withstand voltage is obtained. There has arisen a necessity of reviewing the thickness and doping level of the epitaxial layer. The capacitance between the N+ region and the P-epitaxial layer increases, which, in turn, increases the capacitance between the source and the drain, thus hampering the operation of the semiconductor device.
The present invention has been conceived to solve the problem and is aimed at providing a semiconductor device which can protect a transistor even when a high voltage is applied to the drain of the device, without involvement of an increase in the capacitance of a neighborhood area of the drain.
According to one aspect of the present invention, a semiconductor device includs a gate electrode formed on a semiconductor substrate by way of a gate insulating film, and a pair of impurity diffusion layers formed in surface regions of the semiconductor substrate on both sides of the gate electrode. The semiconductor device comprises an additional impurity diffusion layer formed in a predetermined region of the impurity diffusion layer so as to protrude toward a position lower than the bottom of the impurity diffusion layer.
According to another aspect of the present invention, a method of manufacturing a semiconductor device comprises the following steps. Firstly a gate electrode is formed on a semiconductor substrate by way of a gate insulating film. Secondly a pair of impurity diffusion layers are formed on surface regions of the semiconductor substrate on both sides of the gate electrode by means of introducing first impurities into the semiconductor substrate while the gate electrode is taken as a mask. Thirdly a resist mask having a predetermined opening section is formed on the semiconductor substrate. Fourthly an additional impurity diffusion layer connected to the impurity diffusion layers is formed by means of introducing second impurities while the resist mask is taken as a mask.
An additional impurity diffusion layer is formed in a predetermined area on an impurity diffusion layer provided on either side of a gate electrode so as to protrude to a position lower than the bottom of the impurity diffusion layer. As a result, when a surge voltage is applied between the impurity diffusion layers formed both sides of the gate electrode, an electric current can be caused to flow from the additional impurity diffusion layer to a semiconductor substrate located at a lower level, thus preventing destruction of the gate oxide film. The additional impurity diffusion layer is formed in only predetermined areas on the impurity diffusion layers, thereby minimizing an increase in the capacitance of the impurity diffusion layers.
According to another aspect of the present invention, a semiconductor device comprisies a gate electrode formed on a semiconductor substrate by way of a gate insulating film, a pair of impurity diffusion layers formed on the surface regions of the semiconductor substrate on both sides of the gate electrode, and an additional impurity diffusion layer connected to one of the pair of impurity diffusion layers. The breakdown voltage between the impurity diffusion layer and the additional impurity diffusion layer is made lower than a breakdown voltage between the pair of impurity diffusion layers.
The breakdown voltage between the pair of impurity diffusion layers and the additional impurity diffusion layer is made lower than that developing between the pair of impurity diffusion layers. As a result, there can be prevented application of a surge voltage between the pair of impurity diffusion layers and destruction of a gate oxide film.
Other and further objects, features and advantages of the invention will appear more fully from the following description.